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  oxygen tm hd CMI8788 high performance pci audio processo r data sheet v 0. 6 2005/0 9 / 12
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 1 c - media confidential notices this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particul ar purpose, or any warranty otherwise arising out of any proposal, document or sample. all rights reserved. no part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including information storage and retrieval systems, without permission in writing from the c - media electronics, inc. third - party brands and names are the property of their respective owners. dolby ? logo is the trademark of dolby lab. d ts ? logo is the trademark of dts lab. copyright 2 004 - 2005 ? c - media electronics inc. c - media electronics, inc. 6f, 100, sec. 4, civil boulevard, taipei, taiwan 106, r.o.c. tel: 886 - 2 - 8773 - 1100 fax: 886 - 2 - 8773 - 2211 http://www.cmedia.com.tw for detailed product information, please contact sal es@cmedia.com.tw
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 2 c - media confidential contents 0. revision history ................................ ................................ ......................... 4 1. features and software description ................................ ...................... 5 1.1 hardware features ................................ ................................ ............. 5 1.2 software features ................................ ................................ ............... 6 1.3 general description ................................ ................................ ........... 7 1.4 application ................................ ................................ ......................... 8 2. block diagram ................................ ................................ ............................ 9 3. pin assignment ................................ ................................ ........................... 10 3 .1 pinout diagram ................................ ................................ .................. 10 3.2 pin descriptio n ................................ ................................ ................... 11 4. electrical characteristics ................................ ................................ ....... 1 6 4 .1 maximum ratings ................................ ................................ .............. 1 6 4 .2 recommended operation conditions ................................ ................ 1 6 4 .3 power consumption ................................ ................................ ............ 1 6 4 .4 dc characteristics ................................ ................................ ............. 1 7 4 .5 eeprom ac timing characteristics ................................ ................ 1 7 4.5.1 i 2 s signal timing ................................ ................................ .. 17 4.5. 2 control interface timin g - 3 - wire mode ............. 17 4.5. 3 control interface timing - 2 - wire mode ............. 20 4.5. 4 eeprom interface timing ................................ ............... 21 4.5. 5 eeprom ac timing characteristics ................................ ......... 22 4.5. 6 ac - link timing characteristics ................................ 23 5. mechanical specifications ................................ ................................ ...... 27 5 . 1 package dimension ................................ ................................ ............ 27
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 3 c - media confidential list o f figures figure 1. block diagram of oxygen tm hd CMI8788 ................................ ...................... 9 figure 2. pinout diagram of oxygen tm hd CMI8788 ................................ ................... 10
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 4 c - media confidential 0. revision history date rev. release note 200 5 /0 3 / 15 0.1 preliminary vision 2005/04/18 0.2 modify s/w features 2005/07/22 0. 5 edit for readability 2005/9/12 0. 6 m odify s/w features
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 5 c - media confidential 1. features and general description 1.1 hardware features n pci 2.2 interface with bus mastering and burst modes n o nly one 24.576mhz oscillator is needed n 4 synchronous i 2 s output data stream pairs within 1 flexible output dma n program m able channel routing mechanism among the 4 i 2 s output pairs n 4 synchronous i 2 s input data stream pairs spread in 3 input dma ? s (for dolby pro - audio applications) n optionally , a multi - channel ac - link can support 2 ac97 codecs n programmable hw monitoring routing from i 2 s inputs to outputs n all i 2 s i/o pairs support 32 - bit pcm data transfer and adjustable sample rate ( up to 192khz ) n integrated 192k/24 - bit s/pdif transmitter with 1 dedicated s/pdif out dma n integrated 192k/24 - bit s/ pdif receiver in recording dma n s/pdif in supports digital loop back path for switching between optical and rca connection s n 48k/16 - bit front panel dma for ac 97 codec n 2 - wire master ser ial bus or 4 - wire spi ( s erial peripheral i nterface) bus to control i 2 s codecs n 2 - wire slave serial bus to communicate with microcontroller unit (mcu) n interrupt pin to inform external mcu to retrieve the data from the system driver n one mpu - 401 midi uart port n eeprom control interface n 6 gpi phone jack detection pins n advanced device - sensing technology indicates whether a speaker or a headphone is plugged in the jack n 9 direct - access gpio pins n 3 bonding - option bits for 8 identification possibilites n 128 - pin lqfp thin high - quality package
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 6 c - media confidential 1.2 software features n dts ? interactive ? a real - time 5.1 channel encoder that takes 2 or more channels and encodes them into a dts bit stream. n dts ? neopc - an up - mix matrix that turns any 2 channel aud io into 7.1 channel surround sound n dolby ? digital live ( ac - 3 ) real - time 5.1 channel encoding bit - stream to facilitate the connection with ce av receiver n dolby ? pro - logic iix surround processor , spreading stereo audio into 7.1 channel surround sound n renowne d dolby ? headphone technology , conveying 5.1 surround and 3d gaming audio over stereo headphones n the l atest dolby ? virtual speaker solution , creating amazing virtual surround sound from a generic two - speaker configuration n c - media flexbass tm ? configurable lfe channel crossover frequ ency (from 50 to 2 50hz ) n c - media magic voice tm , a popular feature for disguising voice in online chatting n c - media xear 3d? 7.1 virtual speaker s hifter technology n c - media ?s unique karaoke f unctions: microphone echo, key - s hifting n individual 10 - band eq for each channel n 27 global reverberation environments n play3d demo program n supports most industrial standards of 3d sound for pc gaming, including eax? 1.0&2.0, a3d ? 1.0, and directsound? n support 7.1 ch digital audio playback for winxp, 2k, me, 98se (microsoft ? directx v.9.0 and above is required) n linux driver available (w ith o ut d olby ? and dts ? technologies )
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 7 c - media confidential 1.3 general description the CMI8788 is a high quality pci 32 - bit multi - channel audio processor that can be built in to home audio electronics or personal computer s to provide high fidelity sound playback a nd processing . it supports up to 12 out put channels and 8 in put channels. the 12 out put channels are composed of 3 playback dma ? s, which are multi - channel dma (32 bits, 8 channels, 192k), s/pdif dma (32 bits, 2 channels, 192k), and front panel dma (16 bits , 2 channels, 48k). the 8 in put channels are spread across 3 recording dma ? s (32 bits, 192k) - recording a, b, and c dma ? s. the architecture of recording is a unique point of CMI8788 that enables very flexible recording options for the user. the details of the recording mode selection will be explained in the later sections. the CMI8788 is compatible with all the popular codecs , from i 2 s codecs with over 120db quality to the usual ac97 codecs. this ability gives customers the flexibility to design their pro ducts exactly the way they want them . the i 2 s, ac - link, 2 - wire master bus, and spi inte r faces are used to transfer audio data and control data between the CMI8788 and codecs. to facilitate the connection with existing home audio electronics, the CMI8788 ha s incorporated the s/pdif transmitter and receiver with 192k sampling rate. an eeprom interface is built for the CMI8788 in connection with the eeprom to store and retrieve the non - evaporable data for customer applications, such as board configuration, sub - vend o r and sub - system ids of the pci configuration, or any dynamic data that customers want to restore at the next power - on . the CMI8788 has an independent 2 - wire slave bus to communicate with the micro co n trol unit (mcu). t his interface is used as a medi um for the system driver and the mcu to exchange data . one of the application s of the 2 - wire slave bus is to transmit the co n trol data from the remote controller to the system driver. the mpu - 401 midi uart is also integrated in the CMI8788. there are six g pi phone jack detect pins in CMI8788, which can be used to disti n guish if a cable is plugged in the phone jack. the re are 9 gpio pins on the chip, h o w ever some of them are shared with other functions. the c - media ? s unique device sen s ing technology is imple mented in CMI8788, which can indicate whether a speaker or a headphone is plugged in the jack. then according to this information, the system driver can decide to turn on the c - media ? s x - ear 3d audio technology if appropriate.
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 8 c - media confidential 1.4 applications n pro - sumer high - quality pci sound card for retail er market n consumer sound card powered by dolby ? and dts ? technologies n pc - based media center n professional pc musician application n high - end motherboard requiring top audio quality n audio up - sell for pc systems n bundle sel ling with high - profile vga cards n general purpose multi - channel i/o
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 9 c - media confidential 2. block diagram figure 1. block diagram of oxygen tm hd cmi87 8 8
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 10 c - media confidential 3. pin assignment 3.1 pinout diagram figure 2. pinout diagram of oxygen tm hd cmi87 8 8
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 11 c - media confidential 3.2 pin description s the fo llowing table gives the pin description s for the oxygen tm hd CMI8788. some of the pins perform multiple functions , so for the sake of consistency, a pin may be listed more than once in the table. the abbreviations used in the pin description table are expla ined below. di: digital input signal do: digital output signal dio: digital bidirectional signal ai: analog input pu: pull - up with 75k [ resistor pd: pull - down with 75k [ resistor #: low active signal table 3.1 pin description table of oxygen tm hd CMI8788 symbol pin no. type description pci bus interface xrst 119 di pci bus reset. xclk33 120 di pci bus clock, 33mhz. xidsel 5 di pci i nitialization device select. this is the chip select during pci configuration access. xgnt# 121 di pci bus grant. when active, pci bus master is granted to CMI8788. xreq# 122 dio pci bus master request. when active , the CMI8788 is request ing to become a bus master. xad[31:0] 1 - 3, 7 - 11, 13 - 15, 25, 27, 28 - 31, 33, 35 - 38, 40 - 44, 123 - 126, 128 dio pci address / data bus xcb#[3:0] 4, 16, 24, 34 dio pci bus command / byte enable x frame# 17 dio pci cycle frame. it is driven by the current master to indicate the beginning and duration of an access xdevsel# 21 dio pci device select. when active, indicates that the driving device has decoded its address as the target of the current access. xirdy# 18 dio pci initiator ready. when active, indicates that the initiat or can complete the current data phase of the transaction. xtrdy# 20 dio pci target ready. when active, indicates the target device can complete the current data phase of the transaction.
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 12 c - media confidential xstop# 22 dio pci stop. when active, indicates that the target is requesting that the master stop the current transaction. xpar 23 dio pci parity. it is even parity across xad[31:0] and xcb#[3:0]. xinta# 118 dio pci interrupt request a. mpu - 401 midi uart interface xtxd 54 dio, pu mp - 401 midi transmitter (output). it is also used as xgpio5~8 and i2s adc 3 configuration (input, 0: gpio5~8, 1: i2s adc 3) at the rising edge of xrst. xrxd 55 di, pu mpu401 midi receiver. i2s interface xdac_mclk 82 do i2s dac master clock output . xdac_lrck 83 dio i2s dac left/right sampl e clock . xdac_bclk 84 dio i2s dac bit clock . xdac_sdout0 85 do i2s dac channel 0,channel 1 serial data output . xdac_sdout1 86 do i2s dac channel 2,channel 3 serial data output . xdac_sdout2 87 do i2s dac channel 4,channel 5 serial data output . xdac_sdo ut3 88 do i2s dac channel 6,channel 7 serial data output . xadc1_mclk 90 do i2s adc 1 and i2s adc 4 master clock output . xadc1_lrck 91 dio i2s adc 1 left/right sample clock . xadc1_bclk 92 dio i2s adc 1 bit clock . xadc1_sdin 93 di, pu i2s adc 1 serial da ta input . xac97_sdi1/ xadc1_sdin1 58 di, pd i2s adc 1 serial data input 1. this pin is shared with ac97 serial data input 1, and determined by xspi_dout /xa1 input co n figuration at the rising edge of xrst. xadc2_mclk 94 do i2s adc 2 master clock output . xadc2_lrck 95 dio i2s adc 2 left/right sample clock . xadc2_bclk 96 dio i2s adc 2 bit clock . xadc2_sdin 97 di, pu i2s adc 2 serial data input . xgpio5/ xadc3_mclk 98 dio, pd i2s adc 3 master clock output . this pin is shared with xgpio5, which is determine d by xtxd input configuration at the rising edge of xrst. xgpio6/ xadc3_bclk 99 dio, pd i2s adc 3 bit clock . this pin is shared with x gpio6, which is determined by xtxd input configuration at the rising edge of xrst. xgpio7/ xadc3_lrck 100 dio, pd i2s ad c 2 left/right sample clock . this pin is shared with x gpio7, which is determined by xtxd input configuration at the rising edge of xrst. xgpio8/ xadc3_sdin 101 dio, pd gpio8, default input. this pin is shared with xadc3_sdin , which determined by xtxd inpu t configuration at the rising edge of xrst. ac - link interface
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 13 c - media confidential x ac97_bclk 63 di, pu ac97 serial clock input 8 xac97_sdi0 62 di, pd ac97 serial data input 0 xac97_sdi1/ xadc1_sdin1 58 di, pd ac97 serial data input 1. this pin is shared with xadc1_sdin1, a nd determined by xspi_dout /xa1 input configuration at the rising edge of xrst. xac97_sync 61 do ac97 frame synchronization. xac97_sdo0 64 do ac97 serial data output 0. xac97_sdo1 59 do ac97 serial data output 1. xac97_rst0 60 do ac97 codec reset 0. xa c97_rst1 57 do ac97 codec reset 1. xac97_mclk 65 do ac97 master clock 24.5760m for ac97 codec. serial port interface xspi_din / xmsda 73 dio, pu spi data input. this pin is shared with 2 - wire master serial data . xspi_clk / xmscl 74 dio, pu spi clock outp ut. this pin is shared with 2 - wire master serial clock . xspi_dout / xa1 75 dio, pu spi data output. this pin is shared with 2 - wire codec address a1 . it is also used as xac97_sdi1 and xadc1_sdin1 configur a tion at the rising edge of xrst (input, 1: xac97_sdi 1, 0: xadc1_sdin1). xspi_cen0 / xa0 77 dio, pu spi chip enable, which select the codec #0 to be controlled. it is shared with i2c codec address a0 . it is also used as xgpio3~4 and sscl/ssda configuration (input, 1: gpio3~4, 0: sscl/ssda) at the rising edge of xrst. xspi_cen 1/ xcid0 78 dio, pu spi chip enable, which select the codec #1 to be controlled (ou t put). it is shared with codec id 0 configuration (input) at the ri s ing edge of xrst. xspi_cen 2/ xcid1 79 dio, pu spi chip enable, which select the codec #2 to be controlled (ou t put). it is shared with codec id 1 configuration (input) at the ri s ing edge of xrst. xspi_cen 3/ xcid2 80 dio, pu spi chip enable, which select the codec #3 to be controlled (ou t put). it is shared with codec id 2 configuration (inp ut) at the ri s ing edge of xrst. xspi_cen 4/ xeesk 68 do spi chip enable, which select the codec #4 to be controlled . it is shared with eeprom serial clock. xspi_cen 5/ xeedo 69 do spi chip enable, which select the codec #5 to be controlled . it is shared wi th eeprom serial data out. 2 - wire master serial bus xmsda/ xspi_din 73 dio, pu 2 - wire serial bus data. this pin is shared with spi data input. xmscl/ xspi_clk 74 dio, pu 2 - wire serial bus clock. this pin is shared with spi clock output. xa1/ xspi_dout 75 dio, pu 2 - wire serial bus codec address a1 . this pin is shared with spi data output. it is also used as xac97_sdi1 and xadc1_sdin1 configuration at the rising edge of xrst (input, 1: xac97_sdi1,
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 14 c - media confidential 0: xadc1_sdin1). xa0/ xspi_cen0 77 dio, pu 2 - wire serial bus codec address a0 . this pin is shared with spi chip enable, which select the codec #0 to be controlled. it is also used as xgpio3~4 and sscl/ssda configuration (input, 1: gpio3~4, 0: sscl/ssda) at the rising edge of xrst. 2 - wire slave serial bus xsscl / xgpio3 52 dio, pu 2 - wire serial bus clock. this pin is shared with xgpio3. xssda/ xgpio4 53 dio, pu 2 - wire serial bus data. this pin is shared with xgpio4. xmcu_int 72 do interrupt output for external micro control unit (mcu). xslave_rdy/ xgpio1 50 di o, pd 2 - wire serial bus data ready . this pin is shared with xgpio1. s/pdif interface xspdifi 107 di s/pdif receiver. xspdifo 116 do s/pdif transmitter. eeprom interface xeecs 67 dio, pd eeprom chip enable (output). it is also used as power on eeprom c s delay configuration (input, 0: no delay, 1: delay 1 clock) at the rising edge of xrst xeesk/ xspi_cen 4 68 do eeprom serial clock. this pin is shared with spi chip enable, which select the codec #4 to be controlled xeedi 66 di, pu eeprom serial data in xeedo/ xspi_cen 5 69 do eeprom serial data out. this pin is shared with spi chip enable, which select the codec #5 to be controlled jack detect gpi interface xgpi0 108 di, pd jack a detection input xgpi1 109 di, pd jack b detection input xgpi2 110 di, pd jack c detection input xgpi3 111 di, pd jack d detection input xgpi4 112 di, pd jack e detection input xgpi5 113 di, pd jack f detection input gpio interface xgpio0 49 dio, pd gpio0, default output low. xgpio1/ xslave_rdy 50 dio, pd gpio1, default output low. this pin is shared with i2c slave data ready . xgpio2 51 dio, pd gpio2, default input. xgpio3/xsscl 52 dio, pu gpio3, default output low. this pin is shared with i2c slave serial clock . xgpio4/xssda 53 dio, pu gpio4, default input. this pin is shared with i2c slave serial data xgpio5/ xadc3_mclk 98 dio, pd gpio5, default output low. this pin is shared with xadc3_mclk , which determined by xtxd input configuration
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 15 c - media confidential at the rising edge of xrst. xgpio6/ xadc3_bclk 99 dio, pd gpio6, default input. this pin is shared with xadc3_bclk , which determined by xtxd input configuration at the rising edge of xrst. xgpio7/ xadc3_lrck 100 dio, pd gpio7, default output low. this pin is shared with xadc3_lrck , which determined by xtxd input configuration at the rising edge of xrst. xgpio8/ xadc3_sdin 101 dio, pd gpio8, default input. this pin is shared with xadc3_sdin , which determined by xtxd input configuration at the rising edge of xrst. headphone sensing interface xhpd_e/ xtest 103 dio, pd head phone dete ct enable . this pin is shared with test mode sele c tion at the rising edge of xrst xhpd_in 104 ai head phone voltage input xhpd_r1 105 ai head phone reference resistor 1 xhpd_r2 106 ai head phone reference resistor 2 miscellaneous xtal1 46 di 24.576mhz osc input xtal2 47 do osc output xrsto 71 do external codec reset, can be programmed as active low or high with register 0x50 - bit 2 xpwdn 115 do power down output pin, active low, default high dvdd 6, 19, 32, 45, 56, 76, 89, 117 3.3v power input dgn d 12, 26, 39, 48, 70, 81, 102, 114 ground
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 16 c - media confidential 4 . electrical characteristics 4 .1 maximum ratings test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c parameter symbol min typ max units storge temperature - - 55 - 150 o c operating ambient temperature - 0 25 75 o c dc supply voltage - 3.0 3.3 3.6 v i/o pin voltage - gnd - v dd v power dissipation - - 0.15 - w 4 .2 recommended operation conditions test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c parameter symbol min typ max units input voltage range - v dd - 0.3 v dd v dd +0.3 v o utput voltage range - 0 - v dd v 4 .3 power consumption test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c parameter symbol min typ max units s upply current : power up - - 40 - ma s upply current : power down - - 10 - ua
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 17 c - media confidential 4 .4 dc characteristics test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c parameter symbol min typ max units input voltage range vin v dd - 0.3 v dd v dd +0.3 v o utput voltage range vout 0 - v dd v h igh level input voltage vih 0.7v dd - - v l ow level input voltage vil - - 0.3v dd v h i gh level output voitage voh 2.4 - - v l ow level output voltage vol - 0.4 v i nput leakage current iil - 10 - 10 ua o utput leakage current iol - 10 - 10 ua o utput buffer driver current - - 8 - ma spdif transmit output driver current - - 8 - ma 4 .5 ac t iming characteristics 4.5.1 i 2 s signal timing 1. system clock timing system clock timing diagram test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c,fs=96khz,mclk=512fs,24 bit data,unless otherwise stated system clock timing parameters
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 18 c - media confidential parameter symbol min typ max units mclk clock cycle time tmclk 20 - - ns mclk pulse width high tmclkh 10 - - ns mclk pulse width high tmclkl 10 - - ns mclk duty cycle 40 50 60 % 2. audio interface timing audio interface timing diagram test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c,fs=96khz,mclk=512fs,24 bit data,unless otherwise stated audio interface timing parameters parameter symbol min typ max units lrck propagation delay from bclk falling edge t dl 5 - - n s sdout propagation delay from bclk falling edge t dd 5 - - n s
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 19 c - media confidential 4.5.2 control interface timing - 3 - wire mode control interface timing - 3 - wire diagram note: latch data at xspi_cen clock low mode , xspi_cen clock can be low or high mode test conditions dvdd = 3.3v, dgnd =0v,ta= +25 o c,spi clock 160 ns ,unless otherwise stated control interface timing - 3 - wire parameters parameter symbol min typ max units xspi_ clk rising edge to xspi_cen rising edge t scs 120 - - ns xspi_clk pulse cycle time t scy 160 - - ns xspi_clk pulse width low t scl 80 - - ns xsp i_clk pulse width high t sch 80 - - ns xspi_dout to xspi_clk set - up time t dsu 40 - - ns xspi_dout to xspi_clk hold time t dho 40 - - ns xspi_cen rising to sclk rising t css 40 - - ns
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 20 c - media confidential 4.5.3 control interface timing - 2 - wire mode control interface tim ing - 2 - wire diagram test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c ,2 wire , fast speed mode, unless otherwise stated control interface timing - 2 - wire parameters parameter symbol min typ max units xmscl frequency 400 - - khz xmscl pulse width low t1 650 - - ns xmscl pulse width high t2 1.3 - - us h old time (start condition) t3 650 - - ns s et - up time (start condition) t4 650 - - ns data set - up time t5 650 - - ns xmsdi,xmscl rise time t6 100 - - ns xmsdi,xmscl fall time t7 100 - - ns s et - up time (stop condition) t8 650 - - ns data hold time t9 650 - - ns note: test parameters at 2 wire , fast speed mode
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 21 c - media confidential 4.5.4 eeprom interface timing eeprom interface timing diagram test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c,unless otherwise stated eepr om interface timing parameters parameter symbol min typ max units xeesk clock frequency tsk 555 - - khz xeesk high time tskh 900 - - ns xee s k low time tskl 900 - - ns xeecs setup time tcss 900 - - ns xeedi setup time tdis 900 - - ns xeecs hold time t csh 900 - - ns xeedi hold time tdih 2 - - ns o utput delay to ? 1 ? tpd1 900 - - ns o utput delay to ? 0 ? tpd0 30 - - ns xeecs to status valid tsv 30 - - ns xeecs to xeedo in high impedance tdf 30 - - ns
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 22 c - media confidential 4.5.5 eeprom ac timing characteristics symbol d escription min max units fsk sk clock frequency 0 0.5 mhz tskh sk high time 500 ns tskl sk low time 500 ns tcss cs setup time 100 ns tcsh cs hold time 0 ns tdis di setup time 200 ns tdih di hold time 200 ns tpd0 output delay to ? 0 ? 500 ns t pd1 output delay to ? 1 ? 500 ns tsv cs to status valid 500 ns tdf cs to do high impedance 200 ns
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 23 c - media confidential 4 .5. 6 ac - link timing characteristics test conditions dvdd = 3.3v, dgnd =0v,ta=+25 o c ,unless otherwise stated 1 . cold reset cold reset timing diagram cold reset timing parameters parameter symbol min typ max units xac97_rst active low pulse width tr st _low 1. 7 - - us xac97_rst inactive to xac97_b clk startup delay trst2clk 168 - - ns # denotes active low.
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 24 c - media confidential 2 . warm reset warm reset di agram warm reset parameters parameter symbol min typ max units xac97_ sync active high pulse width t sync _high 1. 2 - - us xac97_ sync inactive to xac97_ b clk startup delay t sync 2clk 168 - - ns 3 . ac - link clocks bit_clk to sync timing diagra m
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 25 c - media confidential bit_clk to sync timing parameters parameter symbol min typ max units xac97_ bclk frequency 12.288 - - mhz xac97_ bclk period tclk_period 81.4 - - ns xac97_ bclk output jitter 750 - - ps xac97_ bclk high pulsewidth (note 1) tclk_high 40.7 - - ns xac97_ bclk low pulse width (note 1) tclk_low 40.7 - - ns xac97_ sync frequency 48.0 - - khz xac97_ sync period tsync_period 20.8 - - us xac97_ sync high pulse width tsync_high 1.3 - - us xac97_ sync low_pulse width tsync_low 19.5 - - us note: worst case duty cycle restricted to 45/55. 4 . data setup and hold data setup and hold diagram data setup and hold parameters parameter symbol min typ max units setup to falling edge of xac97_ bclk tsetup 30 - - ns hold from falling edge of xac97_ bclk thold 30 - - ns note: setup and hold time parameters for sdata_in are with respect to the ac ?97 controller.
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 26 c - media confidential 5 . signal rising and falling times signal rising and falling times diagram signal rising and falling time parameters param eter symbol min typ max units xac97_ bclk rising time triseclk 6 - - ns xac97_ bclk falling time tfallclk 6 - - ns xac97_ sync rising time trisesync 6 - - ns xac97_ sync falling time tfallsync 6 - - ns xac97_ sdi rising time trisedin 6 - - ns xac97_ sdi fa lling time tfalldin 6 - - ns xac97_ sdo rising time trisedout 6 - - ns xac97_ sdo falling time tfalldout 6 - - ns
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 27 c - media confidential 5 . mechanical specification 5 . 1 package dimension
c - media high performance pci audi o controller oxygen tm hd CMI8788 data s heet v 0. 6 28 c - media confidential - end of datasheet - c - media electronics, inc. 6f, 100, sec. 4, civil boulevard, taipei, taiwan 106, r.o.c. tel: 886 - 2 - 8773 - 1100 fax: 886 - 2 - 8773 - 2211 http://www.cmedia.com.tw for detailed product information, please contact sales@cmedia.com.tw


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